A spread spectrum clock signal is employed in many modern electronic devices. In these electronic devices, a spread spectrum clock signal generator generates a spread spectrum clock signal by spreading a frequency of a reference clock signal over a frequency range. As a result, energy of the reference clock signal is spread over the frequency range of the spread spectrum clock signal. Because the energy is spread over the frequency range of the spread spectrum clock signal, a peak electromagnetic interference emitted by the spread spectrum clock signal is less than a peak electromagnetic interference emitted by the reference clock signal. The spread spectrum clock signal may then be provided to components of the electronic device through an unshielded cable without exceeding electromagnetic interference requirements established for the electronic device by the Federal Communications Commission (FCC).
Techniques for generating a spread spectrum clock signal typically employ a phase-lock loop. In one such technique, a modulated reference clock signal is generated by using a fractional-N divider to modulate a reference clock signal based on a modulation frequency profile. The fractional-N divider, however, may cause undesired high-frequency quantization noise in the modulated reference clock signal. Moreover, a phase-lock loop generates the spread spectrum clock signal by low-pass filtering the modulated reference clock signal. As a result, relatively low-frequency phase modulation components of the modulation frequency profile are passed by the phase-lock loop and undesired high-frequency phase quantization noise is attenuated by the phase locked loop. In this technique, selection of the loop bandwidth of the phase locked loop involves compromise because it may not be possible to simultaneously achieve a satisfactory reduction in quantization noise and pass essential frequency components of the spread spectrum frequency profile to avoid distortion of the spread spectrum frequency profile in the spread spectrum clock signal.
In another technique for generating a spread spectrum clock signal, a current is injected into a low-pass filter of the phase-lock loop to directly modulate a control input of a voltage-controlled oscillator in the phase-lock loop based on a modulation frequency profile. Moreover, the phase-lock loop generates a spread spectrum clock signal having the modulation frequency profile. In this technique, a negative feedback action of the phase-lock loop creates a high-pass transfer function from the point at which the current is injected into the low-pass filter to the output of the phase-lock loop. It is therefore necessary to set the loop bandwidth of the phase-lock loop to a frequency lower than the fundamental modulation frequency of the modulation frequency profile. In this way, the phase-lock loop will pass frequencies above the loop bandwidth that are present in the modulation profile and the modulation frequency profile of the spread spectrum clock signal will not be distorted. A low loop bandwidth of the phase locked loop, however, is undesirable for several reasons. First, the ability of the phase-lock loop to reject undesired influences, such as power supply modulation effects and voltage controlled oscillator phase noise, is degraded. Second, a loop phase detector of the phase-lock loop generates a phase error signal indicating that phase modulation of the spread spectrum clock signal is a phase error. Moreover, the loop phase detector converts the phase error to undesired frequencies which may not be sufficiently attenuated by low pass filtering action of the phase locked loop, resulting in undesired phase jitter in the spread spectrum clock signal. This result occurs because the loop phase detector samples phase error.
In light of the above, a need exists for an improved system and method of generating a spread spectrum clock signal. A further need exists for generating a spread spectrum clock signal having a non-distorted frequency profile and low phase jitter.